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芯片制造——半導(dǎo)體工藝制程實用教程（第六版）（英文版） 
定 價：109 元 叢書名：國外電子與通信教材系列
9 7 4 8 0 7 4 1 9 2 8 1 6 讀者對象:本書可作為高等院校電子科學(xué)與技術(shù)、微電子、集成電路等相關(guān)專業(yè)的高年級本科生或研究生的雙語教材，也可作為半導(dǎo)體行業(yè)職業(yè)技術(shù)培訓(xùn)的教材和從業(yè)人員的參考書。 
本書是一本介紹半導(dǎo)體集成電路和器件制造技術(shù)的專業(yè)書， 在半導(dǎo)體領(lǐng)域享有很高的聲譽。本書的討論范圍包括半導(dǎo)體工藝的每個階段： 從原材料的制備到封裝、 測試和成品運輸， 以及傳統(tǒng)的和現(xiàn)代的工藝。全書提供了詳細的插圖和實例， 并輔以小結(jié)和習(xí)題， 以及內(nèi)容豐富的術(shù)語表。第六版修訂了微芯片制造領(lǐng)域的新進展， 討論了用于圖形化、 摻雜和薄膜步驟的先進工藝和尖端技術(shù)， 使隱含在復(fù)雜的現(xiàn)代半導(dǎo)體制造材料與工藝中的物理、 化學(xué)和電子的基礎(chǔ)信息更易理解。本書的主要特點是避開了復(fù)雜的數(shù)學(xué)問題介紹工藝技術(shù)內(nèi)容， 并加入了半導(dǎo)體業(yè)界的新成果， 可以使讀者了解工藝技術(shù)發(fā)展的趨勢。
Peter Van Zant 國際知名半導(dǎo)體專家，具有廣闊的工藝工程、培訓(xùn)、咨詢和寫作方面的背景，他曾先后在IBM和德州儀器（TI）工作，之后再硅谷，又先后在美國國家半導(dǎo)體（National Semiconductor）和單片存儲器（Monolithic Memories）公司任晶圓制造工藝工程和管理職位。他還曾在加利福尼亞州洛杉磯的山麓學(xué)院（Foothill College）任講師，講授半導(dǎo)體課程和針對初始工藝工程師的高級課程。他是《半導(dǎo)體技術(shù)詞匯》（第三版）（Semiconductor Technology Glossary, Third Edition）、 《集成電路教程》（Integrated Circuits Text）、《安全第一手冊》（Safety First Manual）和《芯片封裝手冊》（Chip Packaging Manual）的作者。他的書和培訓(xùn)教程被多家芯片制造商、產(chǎn)業(yè)供貨商、學(xué)院和大學(xué)所采用。
Peter Van Zant 國際知名半導(dǎo)體專家，具有廣闊的工藝工程、培訓(xùn)、咨詢和寫作方面的背景，他曾先后在IBM和德州儀器（TI）工作，之后再硅谷，又先后在美國國家半導(dǎo)體（National Semiconductor）和單片存儲器（Monolithic Memories）公司任晶圓制造工藝工程和管理職位。他還曾在加利福尼亞州洛杉磯的山麓學(xué)院（Foothill College）任講師，講授半導(dǎo)體課程和針對初始工藝工程師的高級課程。他是《半導(dǎo)體技術(shù)詞匯》（第三版）（Semiconductor Technology Glossary, Third Edition）、 《集成電路教程》（Integrated Circuits Text）、《安全第一手冊》（Safety First Manual）和《芯片封裝手冊》（Chip Packaging Manual）的作者。他的書和培訓(xùn)教程被多家芯片制造商、產(chǎn)業(yè)供貨商、學(xué)院和大學(xué)所采用。
Contents
目錄 Chapter 1?The Semiconductor Industry?半導(dǎo)體產(chǎn)業(yè) 1.1 Introduction?引言 1.2 Birth of an Industry?一個產(chǎn)業(yè)的誕生 1.3 The Solid-State Era?固態(tài)時代 1.4 Integrated Circuits (ICs)?集成電路 1.5 Process and Product Trends?工藝和產(chǎn)品趨勢 1.5.1 Moore’s Law?摩爾定律 1.5.2 Decreasing Feature Size?特征圖形尺寸的減小 1.5.3 Increasing Chip and Wafer Size?芯片和晶圓尺寸的增大 1.5.4 Reduction in Defect Density?缺陷密度的減小 1.5.5 Increase in Interconnection Levels?內(nèi)部連線水平的提高 1.5.6 The Semiconductor Industry Association Roadmap?半導(dǎo)體產(chǎn)業(yè)協(xié)會的發(fā)展藍圖 1.5.7 Chip Cost?芯片成本 1.6 Industry Organization?半導(dǎo)體產(chǎn)業(yè)的構(gòu)成 1.7 Stages of Manufacturing?生產(chǎn)階段 1.8 Six Decades of Advances in Microchip Fabrication Processes?微芯片制造過程發(fā)展的60年 1.9 The Nano Era?納米時代 Review Topics?習(xí)題 References?參考文獻 Chapter 2?Properties of Semiconductor Materials and Chemicals?半導(dǎo)體材料和化學(xué)品的特性 2.1 Introduction?引言 2.2 Atomic Structure?原子結(jié)構(gòu) 2.2.1 The Bohr Atom?玻爾原子 2.3 The Periodic Table of the Elements?元素周期表 2.4 Electrical Conduction?電傳導(dǎo) 2.4.1 Conductors?導(dǎo)體 2.5 Dielectrics and Capacitors?絕緣體和電容器 2.5.1 Resistors?電阻器 2.6 Intrinsic Semiconductors?本征半導(dǎo)體 2.7 Doped Semiconductors?摻雜半導(dǎo)體 2.8 Electron and Hole Conduction?電子和空穴傳導(dǎo) 2.8.1 Carrier Mobility?載流子遷移率 2.9 Semiconductor Production Materials?半導(dǎo)體生產(chǎn)材料 2.9.1 Germanium and Silicon?鍺和硅 2.10?Semiconducting Compounds?半導(dǎo)體化合物 2.11?Silicon Germanium?鍺化硅 2.12?Engineered Substrates?襯底工程 2.13?Ferroelectric Materials?鐵電材料 2.14?Diamond Semiconductors?金剛石半導(dǎo)體 2.15?Process Chemicals?工藝化學(xué)品 2.15.1?Molecules, Compounds, and Mixtures?分子、 化合物和混合物 2.15.2?Ions?離子 2.16?States of Matter?物質(zhì)的狀態(tài) 2.16.1?Solids, Liquids, and Gases?固體、 液體和氣體 2.16.2?Plasma State?等離子體 2.17?Properties of Matter?物質(zhì)的性質(zhì) 2.17.1?Temperature?溫度 2.17.2?Density, Speci?c Gravity, and Vapor Density?密度、相對密度和蒸氣密度 2.18?Pressure and Vacuum?壓力和真空 2.19?Acids, Alkalis, and Solvents?酸、 堿和溶劑 2.19.1?Acids and Alkalis?酸和堿 2.19.2?Solvents?溶劑 2.20?Chemical Purity and Cleanliness?化學(xué)純化和清洗 2.20.1?Safety Issues?安全問題 2.20.2?The Material Safety Data Sheet?材料安全數(shù)據(jù)表 Review Topics?習(xí)題 References??參考文獻 Chapter 3?Crystal Growth and Silicon Wafer Preparation?晶體生長與硅晶圓制備 3.1 Introduction?引言 3.2 Semiconductor Silicon Preparation?半導(dǎo)體硅制備 3.3 Crystalline Materials?晶體材料 3.3.1 Unit Cells?晶胞 3.3.2 Poly and Single Crystals?多晶和單晶 3.4 Crystal Orientation?晶體定向 3.5 Crystal Growth?晶體生長 3.5.1 Czochralski Method?直拉法（CZ） 3.5.2 Liquid-Encapsulated Czochralski?液體掩蓋直拉法 3.5.3 Float Zone?區(qū)熔法 3.6 Crystal and Wafer Quality?晶體和晶圓質(zhì)量 3.6.1 Point Defects?點缺陷 3.6.2 Dislocations?位錯 3.6.3 Growth Defects?原生缺陷 3.6.4 Impurities?雜質(zhì) 3.7 Wafer Preparation?晶圓制備 3.7.1 End Cropping?截斷 3.7.2 Diameter Grinding?直徑滾磨 3.7.3 Crystal Orientation, Conductivity, and Resistivity Check?晶體定向、電導(dǎo)率和電阻率檢查 3.7.4 Grinding Orientation Indicators?滾磨定向指示 3.8 Wafer Slicing?切片 3.9 Wafer Marking?晶圓刻號 3.10?Rough Polish?磨片 3.11?Chemical Mechanical Polishing?化學(xué)機械拋光 3.12?Backside Processing?背面處理 3.13?Double-Sided Polishing?雙面拋光 3.14?Edge Grinding and Polishing?邊緣倒角和拋光 3.15?Wafer Evaluation?晶圓評估 3.16?Oxidation?氧化 3.17?Packaging?包裝 3.17.1?Wafer Types and Uses?晶圓的類型和用途 3.17.2?Reclaim Wafers?晶圓回收 3.18?Engineered Wafers (Substrates)?工程化晶圓（襯底） Review Topics?習(xí)題 References?參考文獻 Chapter 4?Overview of Wafer Fabrication and Packaging?晶圓制造和封裝概述 4.1 Introduction?引言 4.2 Goal of Wafer Fabrication?晶圓生產(chǎn)的目標 4.3 Wafer Terminology?晶圓術(shù)語 4.4 Chip Terminology?芯片術(shù)語 4.5 Basic Wafer-Fabrication Operations?晶圓生產(chǎn)的基礎(chǔ)工藝 4.6 Layering?薄膜工藝 4.6.1 Patterning?圖形化工藝 4.6.2 Circuit Design?電路設(shè)計 4.6.3 Reticle and Masks?光刻母版和掩模版 4.6.4 Basic Ten-Step Patterning Process?基本十步圖形化工藝 4.6.5 Doping?摻雜 4.6.6 Heat Treatments?熱處理 4.7 Example Fabrication Process?晶圓制造實例 4.8 Wafer Sort?晶圓中測 4.9 Packaging?集成電路的封裝 4.10?Summary?小結(jié) Review Topics?習(xí)題 References?參考文獻 Chapter 5?Contamination Control?污染控制 5.1 Introduction?引言 5.1.1 The Problem?問題 5.1.2 Contamination-Caused Problems?污染引起的問題 5.2 Contamination Sources?污染源 5.2.1 General Sources?普通污染源 5.2.2 Air?空氣 5.2.3 Clean Air Strategies?凈化空氣的方法 5.2.4 Cleanroom Workstation Strategy?潔凈工作臺法 5.2.5 Tunnel or Bay Concept?隧道/隔段型設(shè)計 5.2.6 Micro- and Mini-Environments?微局部環(huán)境 5.2.7 Temperature, Humidity, and Smog?溫度、 濕度及煙霧 5.3 Cleanroom Construction?凈化間的建設(shè) 5.3.1 Construction Materials?建造材料 5.3.2 Cleanroom Elements?凈化間要素 5.3.3 Personnel-Generated Contamination?人員產(chǎn)生的污染 5.3.4 Process Water?工藝用水 5.3.5 Process Chemicals?工藝化學(xué)品 5.3.6 Equipment?設(shè)備 5.4 Cleanroom Materials and Supplies?凈化間的材料與供給 5.5 Cleanroom Maintenance?凈化間的維護 5.6 Wafer-Surface Cleaning?晶圓表面清洗 5.6.1 Particulate Removal?顆粒去除 5.6.2 Wafer Scrubbers?晶圓刷洗器 5.6.3 High-Pressure Water Cleaning?高壓水清洗 5.6.4 Organic Residues?有機殘留物 5.6.5 Inorganic Residues?無機殘留物 5.6.6 Chemical-Cleaning Solutions?化學(xué)清洗方案 5.6.7 General Chemical Cleaning?常見的化學(xué)清洗 5.6.8 Oxide Layer Removal?氧化層的去除 5.6.9 Room Temperature and Ozonated Chemistries?室溫和氧化的化學(xué)物質(zhì) 5.6.10?Water Rinsing?水沖洗 5.6.11?Drying Techniques?烘干技術(shù) 5.6.12?Contamination Detection?污染檢測 Review Topics?習(xí)題 References?參考文獻 Chapter 6?Productivity and Process Yields?生產(chǎn)能力和工藝良品率 6.1 Overview?引言 6.2 Yield Measurement Points?良品率測量點 6.3 Accumulative Wafer-Fabrication Yield?累積晶圓生產(chǎn)良品率 6.4 Wafer-Fabrication Yield Limiters?晶圓生產(chǎn)良品率的制約因素 6.4.1 Number of Process Steps?工藝制程步驟的數(shù)量 6.4.2 Wafer Breakage and Warping?晶圓破碎和彎曲 6.4.3 Process Variation?工藝制程變異 6.4.4 Mask Defects?光刻掩模版缺陷 6.4.5 Wafer-Sort Yield Factors?晶圓電測良品率要素 6.4.6 Wafer Diameter and Edge Die?晶圓直徑和邊緣芯片 6.4.7 Wafer Diameter and Die Size?晶圓直徑和芯片尺寸 6.4.8 Wafer Diameter and Crystal Defects?晶圓直徑和晶體缺陷 6.4.9 Wafer Diameter and Process Variations?晶圓直徑和工藝制程變異 6.4.10?Die Area and Defect Density?芯片面積和缺陷密度 6.4.11?Circuit Density and Defect Density?電路密度和缺陷密度 6.4.12?Number of Process Steps?工藝制程步驟的數(shù)量 6.4.13?Feature Size and Defect Size?特征工藝尺寸和缺陷尺寸 6.4.14?Process Cycle Time?工藝制程周期 6.4.15?Wafer-Sort Yield Formulas?晶圓中測良品率公式 6.5 Assembly and Final Test Yields?封裝和最終測試良品率 6.6 Overall Process Yields?整體工藝良品率 Review Topics?習(xí)題 References?參考文獻 Chapter 7?Oxidation?氧化 7.1 Introduction?引言 7.2 Silicon Dioxide Layer Uses?二氧化硅層的用途 7.2.1 Surface Passivation?表面鈍化 7.2.2 Doping Barrier?摻雜阻擋層 7.2.3 Surface Dielectric?表面絕緣體 7.2.4 Device Dielectric (MOS Gates)?器件絕緣體（MOS柵） 7.2.5 Device Oxide Thicknesses?器件氧化物的厚度 7.3 Thermal Oxidation Mechanisms?熱氧化機制 7.3.1 Influences on the Oxidation Rate?氧化率的影響 7.3.2 Thermal Oxidation Methods?熱氧化方法 7.3.3 Horizontal Tube Furnaces?水平管式反應(yīng)爐 7.3.4 Temperature Control System?溫度控制系統(tǒng) 7.3.5 Source Cabinet?氣體柜 7.3.6 Vertical Tube Furnaces?垂直式反應(yīng)爐 7.3.7 Rapid Thermal Processing?快速熱處理（RTP） 7.3.8 High-Pressure Oxidation?高壓氧化 7.3.9 Oxidant Sources?氧化源 7.4 Oxidation Processes?氧化工藝 7.4.1 Preoxidation Wafer Cleaning?氧化前晶圓的清洗 7.5 Postoxidation Evaluation?氧化后評估 7.5.1 Surface Inspection?表面檢測 7.5.2 Oxide Thickness?氧化膜厚度 7.5.3 Oxide and Furnace Cleanliness?氧化膜和爐管清洗 7.5.4 Thermal Nitridation?熱氮化 Review Topics?習(xí)題 References?參考文獻 Chapter 8?The Ten-Step Patterning Process—Surface Preparation to Exposure? ??????十步圖形化工藝流程——從表面制備到曝光 8.1 Introduction?引言 8.2 Overview of the Photomasking Process?光刻工藝概述 8.3 Ten-Step Process?光刻十步法工藝過程 8.4 Basic Photoresist Chemistry?基本的光刻膠化學(xué) 8.4.1 Photoresist?光刻膠 8.5 Photoresist Performance Factors?光刻膠性能的要素 8.5.1 Resolution Capability?分辨率 8.5.2 Adhesion Capability?黏結(jié)能力 8.5.3 Process Latitude?工藝寬容度 8.5.4 Pinholes?針孔 8.5.5 Particle and Contamination Levels?微粒和污染水平 8.5.6 Step Coverage?臺階覆蓋度 8.5.7 Thermal Flow?熱流程 8.5.8 Comparison of Positive and Negative Resists?正膠和負膠的比較 8.6 Physical Properties of Photoresists?光刻膠的物理屬性 8.6.1 Solids Content?固體含量 8.6.2 Viscosity?黏度 8.6.3 Surface Tension?表面張力 8.6.4 Index of Refraction?折射系數(shù) 8.6.5 Storage and Control of Photoresists?光刻膠的存儲和控制 8.6.6 Light and Heat Sensitivity?光和熱敏感度 8.6.7 Viscosity Sensitivity?黏性敏感度 8.6.8 Shelf Life?保存期 8.6.9 Cleanliness?清潔度 8.7 Photomasking Processes—Surface Preparation to Exposure?光刻工藝：從表面制備到曝光 8.8 Surface Preparation?表面制備 8.8.1 Particle Removal?微粒清除 8.8.2 Dehydration Baking?脫水烘焙 8.8.3 Wafer Priming?晶圓涂底膠 8.8.4 Spin Priming?旋轉(zhuǎn)式涂底膠 8.8.5 Vapor Priming?蒸氣式涂底膠 8.9 Photoresist Application (Spinning)?涂光刻膠（旋轉(zhuǎn)式） 8.9.1 The Static Dispense Spin Process?靜態(tài)涂膠工藝 8.9.2 Dynamic Dispense?動態(tài)噴灑 8.9.3 Moving-Arm Dispensing?移動手臂噴灑 8.9.4 Manual Spinners?手動旋轉(zhuǎn)器 8.9.5 Automatic Spinners?自動旋轉(zhuǎn)器 8.9.6 Edge Bead Removal?邊緣堆積去除 8.9.7 Backside Coating?背面涂膠 8.10?Soft Bake?軟烘焙 8.10.1?Convection Ovens?對流烘箱 8.10.2?Manual Hot Plates?手工熱板 8.10.3?In-Line, Single-Wafer Hot Plates?內(nèi)置式單片晶圓熱板 8.10.4?Moving-Belt Hot Plates?移動帶式熱板 8.10.5?Moving-Belt Infrared Ovens?移動帶式紅外烘箱 8.10.6?Microwave Baking?微波烘焙 8.10.7?Vacuum Baking?真空烘焙 8.11?Alignment and Exposure?對準和曝光 8.11.1?Alignment and Exposure Systems?對準系統(tǒng)的性能 8.11.2?Exposure Sources?曝光光源 8.11.3?Alignment Criteria?對準法則 8.11.4?Aligner Types?光刻機的分類 8.11.5?Postexposure Bake?曝光后烘焙 8.12?Advanced Lithography?先進的光刻 Review Topics?習(xí)題 References?參考文獻 Chapter 9?The Ten-Step Patterning Process—Developing to Final Inspection? ????? 十步圖形化工藝流程——從顯影到最終檢驗 9.1 Introduction?引言 9.1.1 Development?顯影 9.1.2 Positive Resist Development?正光刻膠顯影 9.1.3 Negative Resist Development?負光刻膠顯影 9.1.4 Wet Development Processes?濕法顯影 9.1.5 Dry (or Plasma) Development?干法（或等離子體）顯影 9.2 Hard Bake?硬烘焙 9.2.1 Hard-Bake Methods?硬烘焙的方法 9.2.2 Hard-Bake Process?硬烘焙工藝 9.2.3 Develop Inspect?顯影檢驗 9.2.4 Develop Inspect Reject Categories?顯影檢驗拒收分類 9.2.5 Develop Inspect Methods?顯影檢驗的方法 9.2.6 Causes for Rejecting at the Develop Inspection Stage?在顯影檢驗階段拒收的原因 9.3 Etch?刻蝕 9.4 Wet Etching?濕法刻蝕 9.4.1 Etch Goals and Issues?刻蝕的目的和問題 9.4.2 Incomplete Etch?不完全刻蝕 9.4.3 Overetch and Undercutting?過刻蝕和鉆蝕 9.4.4 Selectivity?選擇比 9.4.5 Wet-Spray Etching?濕法噴射刻蝕 9.4.6 Silicon Wet Etching?硅濕法刻蝕 9.4.7 Silicon Dioxide Wet Etching?二氧化硅濕法刻蝕 9.4.8 Aluminum-Film Wet Etching?鋁膜濕法刻蝕 9.4.9 Deposited-Oxide Wet Etching?淀積氧化物濕法刻蝕 9.4.10?Silicon Nitride Wet Etching?氮化硅濕法刻蝕 9.4.11?Vapor Etching?蒸氣刻蝕 9.5 Dry Etch?干法刻蝕 9.5.1 Plasma Etching?等離子體刻蝕 9.5.2 Etch Rate?刻蝕率 9.5.3 Radiation Damage?輻射損傷 9.5.4 Selectivity?選擇比 9.5.5 Ion-Beam Etching?離子束刻蝕 9.5.6 Reactive Ion Etching?反應(yīng)離子刻蝕 9.6 Resist Effects in Dry Etching?干法刻蝕中光刻膠的影響 9.7 Resist Stripping?光刻膠的去除 9.7.1 Wet Chemical Stripping of Nonmetallized Surfaces?無金屬表面的濕法去除 9.7.2 Wet Chemical Stripping of Metallized Surfaces?有金屬表面的濕法化學(xué)去除 9.7.3 Dry Stripping?干法去膠 9.7.4 Post-Ion Implant and Plasma Etch Stripping?離子注入后和等離子體去膠 9.8 New Stripping Challenges?去膠的新挑戰(zhàn) 9.9 Final Inspection?最終目檢 9.10?Mask Making?掩模版的制作 9.11?Summary?小結(jié) Review Topics?習(xí)題 References?參考文獻 Chapter10?Next Generation Lithography?下一代光刻技術(shù) 10.1?Introduction?引言 10.2?Challenges of Next Generation Lithography?下一代光刻工藝的挑戰(zhàn) 10.2.1?High-Pressure Mercury Lamp Sources?高壓汞燈源 10.2.2?Excimer Lasers?受激準分子激光器 10.2.3?Extreme Ultraviolet?極紫外 10.2.4?X-Rays?X射線 10.2.5?Electron Beam or Direct Writing?電子束或直寫 10.2.6?Numerical Aperture of a Lens?鏡頭的數(shù)值孔徑 10.3?Other Exposure Issues?其他曝光問題 10.3.1?Variable Numerical Aperture Lenses?可變數(shù)值孔徑透鏡 10.3.2?Immersion Exposure System?浸沒式曝光系統(tǒng) 10.3.3?Amplified Resist?放大光刻膠 10.3.4?Contrast Effects?反差效應(yīng) 10.4?Other Resolution Challenges and Solutions?其他解決方案及其挑戰(zhàn) 10.4.1?Off-Axis Illumination?離軸光線 10.4.2?Lens Issues and Re?ection Systems?透鏡問題和反射系統(tǒng) 10.4.3?Phase-Shift Masks?相移掩模版（PSM） 10.4.4?Optical Proximity Corrected or Optical Process Correction?光學(xué)臨近修正或光學(xué)工藝修正 10.4.5?Annular-Ring Illumination?環(huán)孔照射 10.4.6?Pellicles?掩模版貼膜 10.5?Surface Problems?晶圓表面問題 10.5.1?Resist Light Scattering?光刻膠的光散射現(xiàn)象 10.5.2 Subsurface Re?ectivity?光刻膠內(nèi)部的光反射現(xiàn)象 10.6 Antire?ective Coatings?防反射涂層 10.6.1 Standing Waves?駐波 10.6.2 Planarization?平坦化 10.7 Photoresist Process Advances?高級光刻膠工藝 10.7.1 Multilayer Resist or Surface Imaging?多層光刻膠或表面成像 10.7.2??Silylation or DESIRE Process?硅烷化反應(yīng)或DESIRE工藝 10.7.3??Polyimide Planarization Layers?聚酰亞胺平坦化層 10.7.4??Etchback Planarization?反刻平坦化 10.7.5??Dual-Damascene Process?雙大馬士革工藝 10.7.6??Chemical Mechanical Polishing?化學(xué)機械拋光 10.7.7??CMP Polishing Pads?化學(xué)機械拋光拋光墊 10.7.8??Slurry?磨料漿 10.7.9??Polishing Rates?拋光速度 10.7.10?Planarity?平整性 10.7.11?Post-CMP Clean?化學(xué)機械拋光后的清潔 10.7.12?CMP Tools?化學(xué)機械拋光設(shè)備 10.7.13?CMP Summary?化學(xué)機械拋光小結(jié) 10.7.14?Re?ow?回流 10.7.15?Image Reversal?圖形反轉(zhuǎn) 10.7.16?Contrast Enhancement Layers?反差增強層 10.7.17?Dyed Resists?染色光刻膠 10.8 Improving Etch De?nition?改進刻蝕工藝 10.8.1 Lift-Off Process?剝離工藝 10.9 Self-Aligned Structures?自對準結(jié)構(gòu) 10.10?Etch Pro?le Control?刻蝕輪廓控制 Review Topics?習(xí)題 References?參考文獻 Chapter 11?Doping?摻雜 11.1 Introduction?引言 11.2 The Diffusion Concept?擴散的概念 11.3 Formation of a Doped Region and Junction?擴散形成的摻雜區(qū)和結(jié) 11.3.1 The N-P Junction?NP結(jié) 11.3.2 Doping Process Goals?摻雜工藝的目的 11.3.3 Graphical Representation of Junctions?結(jié)的圖形表示 11.3.4 Concentration versus Depth Graphs?濃度隨深度變化的曲線 11.3.5 Lateral Diffusion?橫向擴散 11.3.6 Same-Type Doping?同型摻雜 11.4 Diffusion Process Steps?擴散工藝的步驟 11.5 Deposition?淀積 11.5.1 Dopant Sources?擴散源 11.6 Drive-In Oxidation?推進氧化 11.6.1 Oxidation Effects?氧化的影響 11.7 Introduction to Ion Implantation?離子注入簡介 11.8 Concept of Ion Implantation?離子注入的概念 11.9 Ion-Implantation System?離子注入系統(tǒng) 11.9.1 Implant Species Sources?離子注入源 11.9.2 Ionization Chamber?離化反應(yīng)室 11.9.3 Mass Analyzing or Ion Selection?質(zhì)譜分析或離子選擇 11.9.4 Acceleration Tube?加速管 11.9.5 Wafer Charging?晶圓電荷積累 11.9.6 Beam Focus?束流聚焦 11.9.7 Neutral Beam Trap?束流中和 11.9.8 Beam Scanning?束流掃描 11.9.9 End Station and Target Chamber?終端和靶室 11.9.10?Ion-Implant Masks?離子注入掩模 11.10?Dopant Concentration in Implanted Regions?離子注入?yún)^(qū)域的雜質(zhì)濃度 11.10.1?Crystal Damage?晶體損傷 11.10.2?Annealing and Dopant Activation?退火和雜質(zhì)激活 11.10.3?Channeling?溝道效應(yīng) 11.11?Evaluation of Implanted Layers?離子注入層的評估 11.12?Uses of Ion Implantation?離子注入的應(yīng)用 11.13?The Future of Doping?摻雜前景展望 Review Topics?習(xí)題 References?參考文獻 Chapter 12?Layer Deposition?薄膜淀積 12.1 Introduction?引言 12.1.1 Film Parameters?薄膜的參數(shù) 12.2 Chemical Vapor Deposition Basics?化學(xué)氣相淀積基礎(chǔ) 12.2.1 Basic CVD System Components?基本CVD系統(tǒng)構(gòu)成 12.3 CVD Process Steps?CVD的工藝步驟 12.4 CVD System Types?CVD系統(tǒng)分類 12.5 Atmospheric-Pressure CVD Systems?常壓CVD系統(tǒng) 12.5.1 Horizontal-Tube Induction-Heated APCVD?水平爐管熱感應(yīng)式APCVD 12.5.2 Barrel Radiant-Induction-Heated APCVD?桶式輻射感應(yīng)加熱APCVD 12.5.3 Pancake Induction-Heated APCVD?餅式熱感應(yīng)APCVD 12.5.4 Continuous Conduction-Heated APCVD?連續(xù)傳導(dǎo)加熱APCVD 12.5.5 Horizontal Conduction-Heated APCVD?水平熱傳導(dǎo)APCVD 12.6 Low-Pressure Chemical Vapor Deposition?低壓化學(xué)氣相淀積（LPCVD） 12.6.1 Horizontal Conduction-Convection-Heated LPCVD?水平對流熱傳導(dǎo)LPCVD 12.6.2 Ultra-High Vacuum CVD?超高真空CVD 12.6.3 Plasma-Enhanced CVD (PECVD)?增強型等離子體CVD 12.6.4 High-Density Plasma CVD?高密度等離子體CVD 12.7 Atomic Layer Deposition?原子層淀積 12.8 Vapor-Phase Epitaxy?氣相外延 12.9 Molecular Beam Epitaxy?分子束外延 12.10?Metalorganic CVD?金屬有機物CVD 12.11?Deposited Films?淀積膜 12.12?Deposited Semiconductors?淀積的半導(dǎo)體膜 12.13?Epitaxial Silicon?外延硅 12.14?Polysilicon and Amorphous Silicon Deposition?多晶硅和非晶硅淀積 12.15?SOS and SOI?SOS和SOI 12.16?Gallium Arsenide on Silicon?在硅上生長砷化鎵 12.17?Insulators and Dielectrics?絕緣體和絕緣介質(zhì) 12.17.1 Silicon Dioxide?二氧化硅 12.17.2 Doped Silicon Dioxide?摻雜的二氧化硅 12.17.3 Silicon Nitride?氮化硅 12.17.4 High-k and Low-k Dielectrics?高k和低k介質(zhì) 12.18?Conductors?導(dǎo)體 Review Topics?習(xí)題 References?參考文獻 Chapter 13?Metallization?金屬化 13.1 Introduction?引言 13.2 Deposition Methods?淀積方法 13.3 Single-Layer Metal Systems?單層金屬 13.4 Multilevel Metal Schemes?多層金屬設(shè)計 13.5 Conductors Materials?導(dǎo)體材料 13.5.1 Aluminum?鋁 13.5.2 Aluminum-Silicon Alloys?鋁硅合金 13.5.3 Aluminum-Copper Alloy?鋁銅合金 13.5.4 Barrier Metals?阻擋層金屬 13.5.5 Refractory Metals and Refractory Metal Silicides?難熔金屬和難熔金屬硅化物 13.6 Plugs?金屬塞 13.7 Sputter Deposition?濺射淀積 13.7.1 Copper Dual-Damascene Process?雙大馬士革銅工藝 13.7.2 Low-k Dielectric Materials?低k介質(zhì)材料 13.7.3 The Dual-Damascene Copper Process?雙大馬士革銅工藝 13.7.4 Barrier or Liner Deposition?阻擋層或襯墊層 13.7.5 Seed Deposition?種籽層 13.8 Electrochemical Plating?電化學(xué)鍍膜 13.9 Chemical-Mechanical Processing?化學(xué)機械工藝 13.10?CVD Metal Deposition?CVD金屬淀積 13.10.1?Doped Polysilicon?摻雜多晶硅 13.10.2?CVD Refractory Deposition?CVD難熔金屬淀積 13.11?Metal-Film Uses?金屬薄膜的用途 13.11.1?MOS Gate and Capacitor Electrodes?MOS柵極和電容器極板 13.11.2?Backside Metallization?背面金屬化 13.12?Vacuum Systems?真空系統(tǒng) 13.12.1?Dry Mechanical Pumps?干機械泵 13.12.2?Turbomolecular Hi-Vac Pumps?渦輪分子高真空泵 Review Topics?習(xí)題 References?參考文獻 Chapter 14?Process and Device Evaluation?工藝和器件的評估 14.1 Introduction?引言 14.2 Wafer Electrical Measurements?晶圓的電特性測量 14.2.1 Resistance and Resistivity?電阻和電阻率 14.2.2 Resistivity Measurements?電阻率的測量 14.2.3 Four-Point Probe?四探針測試儀 14.3 Process and Device Evaluation?工藝和器件評估方法 14.3.1 Sheet Resistance?方塊電阻 14.3.2 Four-Point Probe Thickness Measurement?四探針測試儀測量厚度 14.3.3 Concentration or Depth Pro?le?摻雜濃度或深度形貌 14.3.4 Secondary Ion Mass Spectrometry?二次離子質(zhì)譜法 14.3.5 Optically Modulated Optical Reflection (Thermawave)?光調(diào)制光反射（熱波） 14.4 Physical Measurement Methods?物理測試方法 14.5 Layer Thickness Measurements?層厚的測量 14.5.1 Color?顏色 14.5.2 Spectrophotometers or Re?ectometry?分光光度計或反射計 14.5.3 Ellipsometers?橢偏儀 14.5.4 Stylus (Surface Pro?lometers)?觸針（表面形貌儀） 14.5.5 Optical Profilometer?光學(xué)形貌儀 14.5.6 Photoacoustic?光聲法 14.5.7 Four-Point Probe?四探針 14.5.8 Ultra-Thin MOSFET Gate Thickness?超薄MOS場效應(yīng)晶體管柵厚度 14.6 Gate Oxide Integrity Electrical Measurement?柵氧化層完整性電學(xué)測量 14.7 Junction Depth?結(jié)深 14.7.1 Groove and Stain?凹槽和染色 14.7.2 Scanning Electron Microscope Thickness Measurement?掃描電鏡厚度測量 14.7.3 Spreading Resistance Probe?擴展電阻測試法 14.7.4 Secondary Ion Mass Spectrometry?二次離子質(zhì)譜法 14.7.5 Scanning Capacitance Microscopy?掃描電容顯微鏡 14.7.6 Carrier Illumination junction Depth?載流子激發(fā)結(jié)深 14.7.7 Critical Dimensions and Line-Width Measurements?關(guān)鍵尺寸和線寬測量 14.7.8 Optical Image-Shearing Dimension Measurement?光學(xué)圖像剪切尺寸測量 14.7.9 Shape Metrology and Optical Critical Dimension?圖形度量衡學(xué)和光學(xué)關(guān)鍵尺寸 14.8 Contamination and Defect Detection?污染物和缺陷檢測 14.8.1 1×Visual Surface Inspection Techniques?1×直觀表面檢測技術(shù) 14.8.2 1×Collimated Light?1×平行光 14.8.3 1×Ultraviolet?1×紫外線 14.8.4 Microscope Techniques?顯微鏡技術(shù) 14.8.5 Automated In-Line Defect Inspection Systems?自動在線缺陷檢測系統(tǒng) 14.9 General Surface Characterization?總體表面特征 14.9.1 Atomic Force Microscopy?原子力顯微鏡 14.9.2 Scattrometry?散射儀 14.10?Contamination Identi?cation?污染認定 14.10.1?Auger Electron Spectroscopy?俄歇電子譜 14.10.2?Electron Spectroscope for Chemical Analysis?用于化學(xué)分析的電子分光鏡 14.10.3?Time of Flight Secondary Ion Mass Spectrometry?飛行時間二次離子質(zhì)譜法 14.10.4?Evaluation of Stack Thickness and Composition?堆疊厚度和成分的評估 14.11?Device Electrical Measurements?器件電學(xué)測量 14.11.1?Equipment?設(shè)備 14.11.2?Resistors?電阻器 14.11.3?Diodes?二極管 14.11.4?Bipolar Transistors?雙極型晶體管 14.11.5?MOS Transistors?MOS晶體管 14.11.6?Capacitance-Voltage Profiling?電容–電壓曲線 14.11.7?Device Failure Analysis-Emission Microscopy?器件失效分析–發(fā)射顯微鏡 Review Topics?習(xí)題 References?參考文獻 Chapter 15?The Business of Wafer Fabrication?晶圓制造中的商業(yè)因素 15.1 Introduction?引言 15.1.1 Moore’s Law and the New Wafer-Fabrication Business?摩爾定律和新晶圓制造商業(yè) 15.2 Wafer-Fabrication Costs?晶圓制造的成本 15.2.1 Overhead?一般管理費用 15.2.2 Materials?材料 15.2.3 Equipment?設(shè)備 15.2.4 Labor?勞動力 15.2.5 Production Cost Factors?生產(chǎn)成本因素 15.2.6 Yield?良品率 15.2.7 Yield Improvements?良品率的提高 15.2.8 Yield and Productivity?良品率和生產(chǎn)率 15.2.9 Increasing Wafer Diameters?增大晶圓直徑 15.2.10?Book-to-Bill Ratio?賬面–單據(jù)（book-to-bill）比率 15.2.11?Cost of Ownership?擁有成本 15.3 Automation?自動化 15.3.1 Process Automation?工藝自動化 15.3.2 Wafer-Loading Automation?晶圓裝載自動化 15.3.3 Clustering?集簇 15.3.4 Wafer-Delivery Automation?晶圓傳送自動化 15.3.5 Closed-Loop Control-System Automation?閉環(huán)控制系統(tǒng)自動化 15.4 Factory-Level Automation?工廠層次的自動化 15.5 Equipment Standards?設(shè)備標準 15.5.1 Fab Floor Layout?芯片廠的地面布局 15.5.2 Batch versus Single-Wafer Processing?批量和單晶圓工藝 15.5.3 Green Fabs?綠色芯片廠 15.6 Statistical Process Control?統(tǒng)計制程控制 15.7 Inventory Control?庫存控制 15.7.1 Just-in-Time Inventory Control?及時庫存控制 15.8 Quality Control and Certi?cation—ISO 9000?質(zhì)量控制和ISO 9000認證 15.9 Line Organization?生產(chǎn)線組織架構(gòu) Review Topics?習(xí)題 References?參考文獻 Chapter 16?Introduction to Devices and Integrated Circuit Formation?器件和集成電路組成的介紹 16.1 Introduction?引言 16.2 Semiconductor-Device Formation?半導(dǎo)體器件的形成 16.2.1 Resistors?電阻器 16.2.2 Capacitors?電容器 16.2.3 Diodes?二極管 16.2.4 Transistors?晶體管 16.2.5 Field-Effect Transistors?場效應(yīng)晶體管（FET） 16.3 Alternatives to MOSFET Scaling Challenges?MOSFET按比例縮小帶來的挑戰(zhàn)的替代方案 16.3.1 Conductors?導(dǎo)體 16.4 Integrated-Circuit Formation?集成電路的形成 16.4.1 Bipolar Circuit Formation?雙極型電路的形成 16.4.2 MOS Integrated Circuit Formation?MOS集成電路的形成 16.5 Bi-MOS? 16.5.1 Silicon on Insulator Isolation?絕緣體上硅隔離 16.5.2 System on (a) Chip?片上系統(tǒng) 16.6 Superconductors?超導(dǎo)體 16.6.1 Microelectromechanical Systems?微電子機械系統(tǒng)（MEMS） 16.6.2 Strain Gauges?應(yīng)變儀 16.6.3 Batteries?電池 16.6.4 Light-Emitting Diodes?發(fā)光二極管 16.6.5 Optoelectronics?光電子學(xué) 16.6.6 Solar Cells?太陽能電池 16.6.7 Temperature Sensing?溫度傳感器 16.6.8 Acoustic Wave Devices?聲波器件 Review Topics?習(xí)題 References?參考文獻 Chapter 17?Introduction to Integrated Circuits?集成電路簡介 17.1 Introduction?引言 17.2 Circuit Basics?電路基礎(chǔ) 17.3 Integrated Circuit Types?集成電路的類型 17.3.1 Logic Circuits?邏輯電路 17.3.2 Memory Circuits?存儲器電路 17.3.3 Redundancy?冗余電路 17.4 The Next Generation?下一代產(chǎn)品 Review Topics?習(xí)題 References?參考文獻 Chapter 18?Packaging?封裝 18.1 Introduction?引言 18.2 Chip Characteristics?芯片的特性 18.3 Package Functions and Design?封裝功能和設(shè)計 18.3.1 Substantial Lead System?基本引腳系統(tǒng) 18.3.2 Physical Protection?物理性保護 18.3.3 Environmental Protection?環(huán)境性保護 18.3.4 Heat Dissipation?散熱 18.3.5 Common Package Parts?常用的封裝件 18.3.6 Cleanliness and Static Control?潔凈度和靜電控制 18.3.7 Basic Bonding Processes?基本鍵合工藝 18.4 Wire Bonding Process?引線鍵合工藝 18.4.1 Prebonding Wafer Preparation?鍵合前晶圓的準備 18.4.2 Die Separation?劃片 18.4.3 Die Pick and Place?取放芯片 18.4.4 Die Inspection?芯片檢查 18.4.5 Die Attach?貼片 18.4.6 Wire Bonding?引線鍵合 18.4.7 Tape Automated Bonding Process?載帶自動焊 18.4.8 Bump or Ball Flip-Chip Bonding?凸點或焊球倒扣壓焊 18.5 Example Bump or Ball Process?凸點或焊球工藝示例 18.5.1 Copper Metallization (Damascene) Bump Bonding?銅金屬化（大馬士革）凸點鍵合 18.5.2 Re?ow?回流 18.5.3 Die Separation and Die Pick and Place?劃片、 取片和放置 18.5.4 Alignment of Die to Package?芯片與封裝體對準 18.5.5 Attachment to Package (or Substrate)?黏結(jié)到封裝體（或襯底）上 18.5.6 De?ux?去焊料 18.5.7 Under?llment?下部填充 18.5.8 Encapsulation?包裝 18.5.9 Postbonding and Preseal Inspection?鍵合后封裝前的檢測 18.5.10?Sealing Techniques?密封技術(shù) 18.5.11?Lead Plating?引腳電鍍 18.5.12?Plating Process Flows?電鍍工藝流程 18.5.13?Lead Trimming?引腳切筋成形 18.5.14?De?ashing?外部打磨 18.5.15?Package Marking?封裝體打標記 18.5.16?Final Testing?最終測試 18.5.17?Environmental Tests?環(huán)境適應(yīng)性測試 18.5.18?Electrical Testing?電性能測試 18.5.19?Burn-In Tests?老煉試驗 18.6 Package Design?封裝設(shè)計 18.6.1 Metal Cans and Dual In-Line Packages?金屬罐法和雙列直插式封裝 18.6.2 Pin Grid Arrays?針柵陣列 18.6.3 Ball-Grid Arrays or Flip-Chip Ball-Grid Arrays?球柵陣列或芯片倒裝球柵陣列 18.6.4 Quad Packages?四面引腳封裝 18.6.5 Thin Packages?薄型封裝 18.6.6 Chip-Scale Packages?芯片尺寸的封裝 18.6.7 Lead on Chip?引腳在芯片上 18.6.8 Three-Dimensional Packages?三維封裝 18.6.9 Stacking Die Techniques?芯片疊層技術(shù) 18.6.10?Three-Dimensional Enabling Technologies?三維授權(quán)技術(shù) 18.6.11?Hybrid Circuits?混合型電路 18.6.12?Multichip Modules?多芯片模塊 18.6.13?The Known Good Die Problem?已知好芯片問題 18.7 Package Type or Technology Summary?封裝類型和技術(shù)小結(jié) 18.7.1 Package or PCB Connections?封裝或印制電路板連接 18.7.2 Bare Die Techniques and Blob Top?裸芯片技術(shù)和頂部滴膠 Review Topics?習(xí)題 References?參考文獻 Glossary?術(shù)語表 Index?索引
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